Well, in fact he wanted an extensive interview about the background, history etc. of my project and how it is done, but that was just too much for me - I'm not interested in such things (especially not in English), so I just sent him a short answer (and this quote was one of my statements).

Hallo Franz
Du darfst/solltest stolz sein, dass Deine grossartige Arbeit nun selbst bei ChessBase aufgenommen bzw. gewürdigt wurde.
Gruss
Kurt

Hallo Kurt

definitiv...

gruß Mark 1

For anyone who's curious about it, let me describe the extraction of the ROM for Fidelity Checker Challenger 2. It is not your standard desolder->romchip in reader tool->rom file comes out

A few years ago, Yovan bought Checker Challenger 2 for dumping the ROM. From his PCB photos, we saw it has a NEC UCOM-4 MCU, the CPU is emulated in MAME but it is not easy to dump electronically. Yovan was reluctant to send the pcb to someone else, and a rom dump didn't happen.

A couple of years later (2 weeks ago), I spotted a very cheap one on ebay. Sean Riddle ( http://www.seanriddle.com/decap.html ) and I purchased it and he started working on dumping the ROM.
The dumping process done by Sean:
- delid(decap) the chip, making the bare die visible
- give it a bath in Whink(diluted hydrofluoric acid) to remove remaining goo and the top layer
- put it under a motorized microscope that makes hundreds of photos (this step is also done before the acid bath)
- stitch photos together and end up with a huge picture, I've uploaded a temporary mirror here: WARNING it's 68MB, 16304x18327 https://tsk-tsk.net/net/temp/checkersacid.jpg
- the ROM bits (literally the 1s and 0s) are in the big array at the top left
- use a tool to extract the bits visually, and verify them
- convert to bytes in correct order (the correct ordering was figured out ages ago when a Roland TB-303 MCU was decapped)

The emulation process is same as usual: Sean sent me a pinout/netlist, and I program the MAME driver.
https://github.com/mamedev/mame/blob...el_checkc2.cpp

WOW, that's a more than complicated procedure!
If all chess ROMs would require this method, I guess we won't have many chess emulations at all.

2 questions:

1) does this ROM contain any CRC bits, so that it could be verified, that all 0/1-bits have been read correctly?

2) would this method also work for devices, where the ROM is integrated in the CPU chip (e.g. the Mephisto Atlanta with a SH7034)?

1) No checksum, but usually on old chips(late 70s, early 80s) the rom bits are very visible as you can see. If there are errors in it, it's easy to fix during visual verification.

2) Don't know until you try. But SH1 is a 90s chip, which means the chip die is much more compact and rom bits will not be as visible.
Also, how much internal ROM does Atlanta have? 32KB? that's more than a quarter million bits, a lot of work.

It's better to figure out a way to dump these chips electronically. Actually, UCOM-4 can be dumped electronically too, it's just difficult.

Neuer tag, neuer rom dump von Berger.
Conchess Plymate 5.5MHz

It is almost identical to the other Plymate dump, most of the differences are due to changed timing I guess.

hap, I'm a bit confused about your new Conchess driver:
In the previous version the T8 was implemented with 8_MHz_XTAL/2, but now you've changed this to 16_MHz_XTAL/2 !?

Does this mean that the T8 has in fact a 16MHz XTAL, which is divided by 2 for the CPU clock?
Most articles on the internet say "4 MHz (8 MHz Quarz)" for the T8.

There's also a Monarch T24,
https://www.schachcomputer-online-mu...s-monarch-t24/
and it says: "Taktfrequenz: 24 MHz (12)" (in one of the pictures there's really a 24MHz XTAL!).

So shouldn't the T8 also have an external 8MHz XTAL? But then it would actually run only with 4MHz (and a T6 with 3MHz, etc.).

Yes it's confusing.

I don't know where this 8MHz version was dumped from, I received the rom dump anonymously(maybe you know who ). Though I don't think it was dumped from a SteveUK Amsterdam T8 4MHz repro PCB.

About real T8:
T6 is around 5 to 6MHz, on an overclocked R65C02P4.
T6 was around 1000DM. T8 was around 1200DM. If T8 has a weaker CPU and the same chess engine, the price increase can not be explained.

Well, your answer doesn't really solve my confusion.

If the internet sources are right, then a Tx should have a x MHz XTAL (externally) and the CPU should get x/2 MHz.
But if this is true, then all MHz values in your driver are wrong, because you're using now (x*2)_MHz_XTAL/2 and that's of course x MHz for the CPU.

So what's in fact correct now?