Hi Drahti,

From what I've seen, this new WDC CPU is much more demanding with the system clock signal. The shape of the signal is important, especially the edges. I have solved some problems by improving the crystal oscillator, or by using one of the encapsulated type.

Also by the type of digital logic used: If the ICs used in the design are CMOS (eg 74 from the HC family) all usually work fine, but not when the design is very old and the ICs work with TTL signal levels. My worst experience, with chess computers, has been repairing Maestro SciSys modules!

Of course, you always have to keep in mind the differences with the old 65C02: pins 1, 5 and 36.

Regards,
Berger